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The impact of PCB hole on signal transmission has the following three points
2023-10-31

Through hole (via) is one of the important components of multi-layer PCB board, and the cost of drilling usually accounts for 30% to 40% of the cost of PCB board. Simply put, every hole on the PCB

can be called a pass hole.

1. Parasitic capacitance through the hole

There is a parasitic capacitance to the ground through the hole itself. If the diameter of the isolation hole through the hole on the paving layer is D2, the diameter of the welding pad through the hole

is D1, the thickness of the PCB board is T, and the dielectric constant of the substrate is ε, the parasitic capacitance through the hole is approximately: The main effect of the parasitic capacitance of

C=1.41εTD1/(D2-D1) through the hole on the circuit is to prolong the rise time of the signal and reduce the speed of the circuit. For example, for a PCB board with a thickness of 50Mil, if a hole with

an inner diameter of 10Mil and a pad diameter of 20Mil is used, and the distance between the pad and the copper floor area is 32Mil, then we can approximate the parasitic capacitance of the hole

through the above formula: C=1.41×4.4×0.050×0.020/(0.032-0.020)=0.517pF, the rise time change caused by this part of capacitance is: T10-90=2.2C(Z0/2)=2.2×0.517x(55/2)=31.28ps. From these

values, it can be seen that although the utility of the rise delay caused by the parasitic capacitance of a single hole is not very obvious, the designer should still carefully consider if the hole is used

multiple times in the line to switch between layers.

2. the parasitic inductance through the hole

Similarly, the presence of parasitic capacitance through the hole also exists parasitic inductance, in the design of high-speed digital circuits, the harm caused by parasitic inductance through the hole

is often greater than the impact of parasitic capacitance. Its parasitic series inductance will weaken the contribution of the bypass capacitor and weaken the filtering effectiveness of the whole power

system. We can simply calculate the parasitic inductance of a through-hole approximation using the following formula: L=5.08h[ln(4h/d)+1] where L refers to the inductance of the through-hole, h

is the length of the through-hole, and d is the diameter of the central borehole. It can be seen from the formula that the diameter of the hole has little influence on the inductance, while the length of

the hole has the greatest influence on the inductance. Using the above example, the out-of-hole inductance can be calculated as: L=5.08×0.050[ln(4×0.050/0.010)+1]=1.015nH. If the rise time of the

signal is 1ns, then its equivalent impedance is: XL=πL/T10-90=3.19Ω. Such impedance can not be ignored in the presence of high-frequency current through, in particular, note that the bypass

capacitor needs to pass through two holes when connecting the power layer and the formation, so that the parasitic inductance of the hole will be multiplied.

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3. high-speed PCB hole design

Through the above analysis of the parasitic characteristics of the hole, we can see that in high-speed PCB design, seemingly simple holes often bring great negative effects to the design of the circuit.

In order to reduce the adverse effects caused by the parasitic effect of the hole, the design can be as far as possible.

(1)from the two aspects of cost and signal quality, choose a reasonable size of the hole. For example, for the design of 6-10 layers of memory module PCB, it is better to choose 10/20Mil(drill/pad)

through holes, and for some high-density small-size boards, you can also try to use 8/18Mil through holes. Under current technical conditions, it is difficult to use a smaller size of the hole. For the

power supply or ground wire hole, you can consider using a larger size to reduce the impedance.

(2)the two formulas discussed above can be concluded that the use of a thinner PCB board is conducive to reducing the two parasitic parameters of the hole.

(3)The pins of the power supply and the ground should be punched in the nearest hole, and the shorter the lead between the hole and the pin, the better, because they will lead to an increase in

inductance. At the same time, the power and ground leads should be as thick as possible to reduce impedance.

(4) the signal wiring on the PCB board should not be changed as far as possible, that is to say, try not to use unnecessary holes.

(5)Place some grounded holes near the holes of the signal change layer to provide the nearest loop for the signal. You can even place a large number of excess ground holes on the PCB board. Of

course, you need to be flexible in your design. The through hole model discussed earlier is the case that each layer has a pad, and sometimes, we can reduce or even remove the pad for some layers.

Especially in the case of very large hole density, it may lead to the formation of a fault slot in the copper layer. To solve this problem, in addition to moving the position of the hole, we can also

consider reducing the size of the pad in the copper layer.

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